Intel Xeon 6 P-core launched - Regaining the leading position

Intel Xeon 6 P-core launched - Regaining the leading position

In recent years, Intel has lost its leading position in general processing and x86 specifically. Particularly in the server segment, where the company has dominated for decades, it has now faced tough competition from AMD's EPYC processors. The restructuring campaign led by CEO Pat Gelsinger undoubtedly involves regaining dominance in this highly lucrative segment.

At Computex a few months ago, Intel introduced the new brand Xeon 6 as a transformation of its server product line. However, the Xeon 6 showcased at Computex only utilized E-core (Sierra Forest), which excelled in power efficiency rather than high performance. The focus on high performance led to the use of P-core (Granite Rapids), which is the main subject of this article.

 

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Nevertheless, it's important to provide some information about Granite Rapids for your reference. Its commercial name will be Xeon 6900P (Sierra Forest being Xeon 6700E). Granite Rapids will feature a maximum configuration of 128 cores @ 2.0/3.2 GHz, with a massive 504 MB L3 cache and a power consumption of TDP 500 W. An interesting detail is that, in addition to supporting 12 channels of DDR5 memory at 6400 MT/s, Granite Rapids will also feature MRDIMM memory up to 8800 MT/s. This memory standard is making its first appearance in the market and significantly contributes to the performance of Granite Rapids, especially in memory bandwidth-intensive tasks.

Granite Rapids also supports 6 UPI 2.0 links and 96 PCIe 5.0 lanes, a significant increase from Sierra Forest. Additionally, Granite Rapids features a larger ISA instruction set, including Intel AMX, AVX2, and AVX-512. Notably, the FP16 and BF16 operators are optimized for more powerful AI processing compared to the previous generation. In terms of architecture, similar to AMD's EPYC, Granite Rapids is comprised of compute and I/O dies. The compute dies are manufactured on Intel 3 process, while the I/O dies are on Intel 7 process. They are interconnected using Intel's self-developed EMIB technology.

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